1. Field of the Invention
The present invention relates to a radar apparatus that is installed inside a vehicle or the like, for example, and is constructed so as to be capable of detecting a distance to a measured object such as an obstacle located in front of the vehicle or the like.
2. Description of the Related Art
When a radar apparatus of this type detects distance to an obstacle such as a vehicle, first a high frequency signal, which has been modulated with a pulse signal as a modulation signal, is outputted from a transmission antenna. The high frequency signal is reflected by the vehicle or other obstacle and is received by a reception antenna. Here, the time taken from the transmission of the high frequency signal to the reception of the high frequency signal is the time taken by the high frequency signal to go back and forth on the distance between the radar apparatus and the obstacle, that is, the time required to cover a distance (2×D) that is double a distance D. However, when detecting an obstacle at a comparatively short distance using a modulation signal with a wide pulse width, before the transmission of the high frequency signal from the transmission antenna has been completed, the high frequency signal reflected by the obstacle starts to be inputted by a reception antenna. This means that for this type of radar apparatus where a reception device does not operate during the transmission of a high frequency signal, a rising edge (or trailing edge) of a front end part of the high frequency signal reflected by the obstacle cannot be detected, so that the distance to the obstacle cannot be detected. Accordingly, to detect the distance to an obstacle at a relatively short distance, it is necessary to reduce the pulse width of the modulation signal sufficiently for the transmission to be completed before the reflected waves from the obstacle arrive at the reception antenna. That is, a pulse signal generating circuit that can generate a modulation signal with a narrow pulse width is required.
A pulse generating circuit disclosed by Japanese Laid-Open Patent Publication No. H06-303114 is one example of a pulse signal generating circuit used in this kind of radar apparatus. As shown in FIG. 1 of this publication, this pulse signal generating circuit includes an inverter provided at a signal input stage, two delay circuits, a NAND circuit that receives an input of a signal from both delay circuits, and a NOR circuit. In this case, one of the delay circuits is constructed of a two-stage inverter and delays an input signal whose polarity has been inverted by an inverter provided at the signal input stage. The other delay circuit is constructed of a three-stage inverter and delays a control signal for controlling an outputting or stopping of output of the pulse signal.
As shown in FIG. 2 of the same publication, with this pulse signal generating circuit, when the input signal of the inverter rises, one of the inputs of the NOR circuit falls to become low. Accordingly, the output of the NOR circuit becomes high. In a state where the control signal is high, when the output of one of the delay circuits has become low after being delayed in accordance with a delay period of the delay circuit, the output of the NAND circuit becomes high after being delayed relative to the input signal by a period in accordance with the delay period and is inputted into the other input of the NOR circuit. When the output of the NAND circuit changes to high, the output of the NOR circuit falls to become low. Accordingly, the NOR circuit maintains a high output for the delay period of a subsystem composed of one of the delay circuits and the NAND circuit. As a result, an output signal with a pulse width equal to the delay period is generated. In this way, it is possible to obtain a pulse signal with a narrow pulse width using this pulse signal generating circuit.
By investigating the pulse signal generating circuit described above, the present inventor discovered the following problems. That is, when the pulse signal generating circuit described above is constructed using a low-cost CMOS logic circuit, the frequency characteristics, delay period, through rate and the like are limited so that it is difficult to generate an output signal with a pulse width of several nanoseconds or less. This means that it is difficult to reduce the minimum detection distance of the radar apparatus. On the other hand, when the pulse signal generating circuit is constructed using an expensive high-speed logic circuit constructed using a compound semiconductor or the like to generate an output signal with a narrow pulse width, there is the problem that the cost of the pulse signal generating circuit, and in turn the cost of the radar apparatus, rise considerably. In addition, when the pulse signal generating circuit is constructed using a combination of logic circuits, there is the problem that the size of the pulse signal generating circuit, and in turn the size of the radar apparatus, become large.